The present invention is directed, in general, to manufacturing a semiconductor wafer and, more specifically, to a method of chemical/mechanical polishing of tungsten layers comprising two phases for reducing tungsten-seam defects in via plugs of integrated circuits.
Referring initially to FIGS. 1A, 1B and 1C, illustrated are sectional views of a contact opening 110, or Via, conventionally formed in a dielectric 101 of semiconductor wafer 100 at progressive stages of tungsten plug 130 formation. FIG. 1A shows a conventional tungsten plug 130 formed in the contact opening 110. The contact opening 110 is typically cylindrical in shape, formed within the dielectric 101, and comprises a bottom 111 and a wall 113. A surface 103 of the dielectric 101 will surround the contact opening or via 110. Underlying the bottom ill of the contact opening 110 is an active component 120 with a contact surface 122. The active component 120 may be the source or drain, or gate region of a conventional semiconductor device, and in the situation where the contact opening 110 is a Via, the active component may be an aluminum trace.
After forming the contact opening 110 in the dielectric 101, titanium (Ti) and titanium nitride (TiN) layers 114, 115, respectively, are deposited on the dielectric surface 103, contact bottom 111 and wall 113. The titanium/titanium nitride layers 114, 115, form adhesion/barrier layers for further deposition. Following the TiN layer, a blanket chemical vapor deposition of tungsten fills the remaining void of the contact opening 110 with tungsten forming a tungsten plug 130. Sufficient tungsten is deposited to xe2x80x9coverfillxe2x80x9d the contact opening 110, forming the tungsten plug 130 and a tungsten layer 136 over the TiN layer 115. After filling the via 110 with the W plug 130, some voids 133a or xe2x80x9ctungsten seamsxe2x80x9d (W-seams) are usually observed in the surface 134 of the W plug 130, especially when the etched profiles are straight.
Chemical/mechanical polishing (CMP) is commonly used to planarize both dielectric and metal layers. For example, CMP is used to remove part of the tungsten (W), Ti and TiN layers to finish the via plug formation down to the dielectric 101. While planarizing the metal layer, a CMP process must avoid or cause only minimal metal dishing and oxide erosion while avoiding removal of the underlying oxide or other dielectric. The process must also avoid introducing non-uniformity to the dielectric thickness.
In CMP, a semiconductor wafer is rotated face-down against a polishing pad in the presence of an abrasive slurry comprising a suspension of small abrasive particles, usually an inorganic oxide, in a chemically acidic or basic aqueous solution. The acidic or basic solution is chosen based upon the primary material, in this instance a metal (tungsten), that is being planarized so as to induce a chemical reaction with the material. The chemical reaction changes the metal to a chemical compound that may be more readily removed by mechanical abrasion. For example, the surface of the tungsten layer 134 may be oxidized with a slurry comprising hydrogen peroxide (H2O2). The resulting tungsten oxide is then more readily removed with an abrasive comprising silicon dioxide (SiO2) and/or aluminum oxide (Al2O3), than metallic tungsten would be.
However, conventional tungsten CMP slurries with an Al2O3 abrasive tend to cause wafer surface scratching because the primary tungsten removal mechanism is mechanical. In this case, polish (removal) rate is a function of the down-force on the wafer as well as the rotation speeds of the platen and wafer carrier; of course, other factors may also enter into the polish rate. Since a relatively high down-force on the wafer is needed with this slurry, metal dishing is a common undesirable effect. To correct for the dishing effect, an additional step, i.e., an xe2x80x9coxide buff,xe2x80x9d is required. Tungsten removal rate with these slurries typically range from about 200 nm per minute to about 500 nm per minute. Of course, it should be understood that the slurry type can readily affect both the removal rate and the wafer uniformity. Slurries that contain aggressive chemistries may provide higher removal rates, but they tend to cause more dishing or erosion.
However, a W-polishing slurry using a silicon dioxide (SiO2) abrasive does not exhibit the scratching problem of the Al2O3 slurry, and therefore does not require the additional oxide buff. The H2O2 component of the slurry oxidizes the W surface, and the oxide is subsequently removed with the mechanical SiO2 abrasive. Removal rate of the tungsten with this slurry ranges from about 250 nm per minute to about 600 nm per minute depending upon, among other factors, the H2O2 concentration, apparatus down force and platen rotational speed. Metal (W, Ti, TiN) removal is continued until the Ti barrier layer 115 and the TiN adhesion layer 114 are planarized down to the dielectric 101.
Referring now to FIG. 1B, illustrated is a sectional view of the conventional tungsten plug of FIG. 1A after removal of exposed tungsten by conventional chemical/mechanical planarization. It is known that the H2O2 will attack W-seams 133a and may even widen them as shown in FIG. 1B.
Referring now to FIG. 1C, illustrated is a sectional view of the conventional tungsten plug of FIG. 1B after removal of the titanium nitride and titanium barrier layers by conventional chemical/mechanical planarization. As can be seen in FIGURE 1C, the W-seam 133a defect may persist even into the finished tungsten plug 130. Such W-seam 133a defects remaining in a finished integrated circuit have proven to cause some electrical device degradation, especially causing leakage current in MOM (metal-oxide-metal) capacitor structures.
Accordingly, what is needed in the art is a method of chemical/mechanical polishing for tungsten layers on semiconductor wafers that reduces the probability of W-seam defects.
To address the above-discussed deficiencies of the prior art, the present invention provides, in one embodiment, a method for polishing a semiconductor substrate comprising: (a) polishing a metal layer located on a semiconductor wafer with a first slurry at a first polishing rate wherein the first slurry has a predetermined concentration of an oxidizing agent therein; (b) forming a second slurry having less than the predetermined concentration of an oxidizing agent therein; and (c) polishing the metal layer at a second polishing rate less than the first polishing rate and in the presence of the second slurry.
In another embodiment, polishing a metal layer at a first polishing rate includes polishing a metal layer at a first polishing rate wherein the predetermined concentration of the oxidizing agent ranges from about 2 to about 6 weight percent by volume. Polishing a metal layer with a first slurry at a first polishing rate, in an alternative embodiment may include polishing a metal layer wherein the first slurry comprises silicon dioxide. Another embodiment provides a method where the step of polishing a metal layer with a first slurry at a first polishing rate includes polishing a metal layer at a first polishing rate wherein the oxidizing agent comprises hydrogen peroxide.
Forming a second slurry may include forming a second slurry having an oxidizer concentration less than about 2.0 percent by volume. In a particular aspect of this embodiment, forming a second slurry includes forming a second slurry having an oxidizer concentration not greater than about 1.7 weight percent by volume. Forming a second slurry, in a related embodiment, includes forming a second slurry by diluting the first slurry with deionized water. The second slurry may be formed by diluting the first slurry with a diluent-to-slurry ratio ranging from about 3:1 to about 6:1.
In another embodiment, polishing at a first polishing rate includes polishing at a first polishing rate ranging from about 350 nm per minute to about 500 nm per minute. More specifically, the first polishing rate may be about 450 nm per minute. Polishing at a second polishing rate, in another embodiment, includes polishing at a second polishing rate ranging from about 60 nm per minute to about 100 nm per minute.
The foregoing has outlined, rather broadly, preferred and alternative features of the present invention so that those skilled in the art may better understand the detailed description of the invention that follows. Additional features of the invention will be described hereinafter that form the subject of the claims of the invention. Those skilled in the art should appreciate that they can readily use the disclosed conception and specific embodiment as a basis for designing or modifying other structures for carrying out the same purposes of the present invention. Those skilled in the art should also realize that such equivalent constructions do not depart from the spirit and scope of the invention in its broadest form.